1/14/2024 0 Comments Memory barrier cache coherence![]() ![]() The MESI protocol is defined by a finite-state machine that transitions from one state to another based on 2 stimuli. Image 1.1 State diagram for MESI protocol Red: Bus initiated transaction. When the block is marked M (modified) or E (exclusive), the copies of the block in other Caches are marked as I (Invalid). Invalid (I) Indicates that this cache line is invalid (unused).įor any given pair of caches, the permitted states of a given cache line are as follows: ![]() The line may be discarded (changed to the Invalid state) at any time. Shared (S) Indicates that this cache line may be stored in other caches of the machine and is clean - it matches the main memory. Alternatively, it may be changed to the Modified state when writing to it. It may be changed to the Shared state at any time, in response to a read request. Exclusive (E) The cache line is present only in the current cache, but is clean - it matches main memory. The write-back changes the line to the Shared state(S). The cache is required to write the data back to main memory at some time in the future, before permitting any other read of the (no longer valid) main memory state. Modified (M) The cache line is present only in the current cache, and is dirty - it has been modified (M state) from the value in main memory. When a write operation is observed to a location that a cache has a copy of the cache controller updates its own copy of the snarfed memory location with the new data.The letters in the acronym MESI represent four exclusive states that a cache line can be marked with (encoded using two additional bits): ![]()
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